1. Field of the Invention
The present invention relates to a semiconductor package and to a method of manufacturing the same, and more particularly to a semiconductor package using a flexible film for wire bonding.
2. Description of the Related Art
In order to decrease the size and at the same time increase the capability and operating speed of devices such as portable electronic products a need has developed for scaling down of semiconductor packages. Such small size packages must be able to package semiconductor circuits that have high capabilities and high operating speed.
In order to reduce the size of semiconductor packages, a chip scale package (CSP), has been proposed. A CSP is a semiconductor package that is only slightly larger than the size of a semiconductor chip.
A stack package is a known type of semiconductor package. A stack package can accommodate a high density of semiconductor chips and it can be multi-functional. A conventional stack package is shown in FIGS. 1 and 2. FIG. 1 is a plan view of a conventional stack package, and FIG. 2 is a cross-sectional view of the stack package along line II–II′ of FIG. 1.
As shown in FIGS. 1 and 2, the stack package comprises a substrate 10. Lead portions 15, each of which includes a plurality of leads 16, are disposed on opposite edges of the substrate 10. A first semiconductor chip 20 and a second semiconductor chip 30 are sequentially bonded to the substrate 10 between the lead portions 15. The first and second semiconductor chips 20 and 30 are bonded to the substrate 10 by an adhesive 12. Bonding pads 20a and 30a are formed on edges of the first and second semiconductor chips 20 and 30, respectively. The second semiconductor chip 30 is bonded to the first semiconductor chip 20 such that the bonding pads 20a of the first semiconductor chip 20 are exposed.
The bonding pads 20a and 30a of the first and second semiconductor chips 20 and 30 are electrically connected to the leads 16, which are external connection terminals, by wires 40. The first and second semiconductor chips 20 and 30 are molded by an epoxy molding compound (EMC) (not shown).
In general, when the semiconductor packages and stack packages are scaled down, the pitch size between adjacent wires must be decreased and the length of the wires must be increased. Thus, a short between wires can easily occur. In particular, when an EMC is formed, even a slight shock may cause a wire to bend or sag toward an adjacent wire. A bend or sag can cause a short between wires which is a very serious matter. Reference character A of FIG. 1 illustrates a short between wires in a horizontal direction, and B of FIG. 2 illustrates a short between wires in a vertical direction.
Also, a conventional wire bonding technique is a relatively slow process since the bonding pads are wire-bonded to the leads on a one-to-one basis.